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General XA FAQs

1. For the XA-H3, XA-H4 and XA-SCC, is the state of Bank 0 the same after all 3 types of Reset?
2. How is the Bank 0 bus width affected by the three different types of resets?
3. Which type of 4Mx16 DRAM does the XA-H4 support and what setup values are needed?
4. If the system stack for an H4 is not located in the first page of memory, where do I locate the stack?
5. Does the XA-H4 DRAM controller support SDRAM?
6. What speed memory devices are needed to run code on the XA-H4 with no wait states?

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